Apple — SoC Integration
Synthesis debug, netlist and SDC analysis, and regression intelligence across SoC blocks.
HW/SW systems work spanning infrastructure, low-latency computing, FPGA design, ASIC tooling, and SoC integration.
Synthesis debug, netlist and SDC analysis, and regression intelligence across SoC blocks.
Low-latency RTL, verification infrastructure, timing closure, PCIe, AXI, and host–FPGA integration.
Synthesis and power flows, automation, design metrics, and regression dashboards.
Embedded C++, BLE communication, and Python validation tooling for a medical device.